DocumentCode
1379420
Title
An automatic controller extractor for HDL descriptions at the RTL
Author
Liu, Chien-Nan Jimmy ; Jou, Jing-Yang
Author_Institution
Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
17
Issue
3
fYear
2000
Firstpage
72
Lastpage
77
Abstract
Extracting controlling finite-state machines can significantly reduce state space and thereby speed functional verification. The controller extraction algorithm uses an approach that frees it from restrictions on HDL code writing style
Keywords
finite state machines; logic CAD; HDL descriptions; RTL; controller extraction; finite-state machines; functional verification; Automatic control; Clocks; Data mining; Filtering; Hardware design languages; Signal processing; Size control; State-space methods; Testing; Writing;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/54.867897
Filename
867897
Link To Document