Title :
Design and Analysis of a CMOS Ratio-Memory Cellular Nonlinear Network (RMCNN) Requiring No Elapsed Time
Author :
Wu, Chung-Yu ; Chen, Sheng-Hao ; Wu, Yu
Author_Institution :
Nanoelectron. & Gigascale Syst. Lab., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
fDate :
6/1/2010 12:00:00 AM
Abstract :
A CMOS ratio-memory cellular nonlinear network (RMCNN) requiring no elapsed time is proposed. The correlations between any two neighboring cells are stored in the memories. The ratio weights of each cell are generated through a comparison of the four correlations around one cell with the mean value of these four correlations. With this method, the elapsed time required by the previously existing RMCNN algorithm is no longer required and, therefore, the ratio weights can be generated individually. Moreover, the use of multi-dividers can be avoided to make the circuit simple. Based on the proposed algorithm, a CMOS RMCNN chip requiring no elapsed time has been designed and fabricated using TSMC 0.35-μm 2P4M mixed-signal technology. In the fabricated chip, three test patterns can be learned and recognized.
Keywords :
CMOS memory circuits; integrated circuit design; mixed analogue-digital integrated circuits; neural nets; CMOS RMCNN chip; CMOS ratio-memory cellular nonlinear network; TSMC 2P4M mixed-signal technology; elapsed multidividers; no elapsed time; size 0.35 mum; CMOS; Cellular nonlinear networks (CNN); elapsed time; ratio memory cellular nonlinear networks (RMCNN);
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2009.2031704