A Built-In-Test Circuit for RF Differential Low Noise Amplifiers

Author

Dermentzoglou, Lambros E. ; Arapoyanni, Angela ; Tsiatouhas, Yiorgos

Author_Institution

Dept. of Inf. & Telecommun., Nat. & Kapodistrian Univ. of Athens, Athens, Greece

Volume

57

Issue

7

fYear

2010

fDate

7/1/2010 12:00:00 AM

Firstpage

1549

Lastpage

1558

Abstract

This paper presents an efficient, low-cost, built-in test (BIT) circuit for radio frequency differential low noise amplifiers (DLNAs). The BIT circuit detects amplitude alterations at the outputs of the DLNA, due to parametric or catastrophic faults, and provides a single digital Pass/Fail indication signal. A triple modular redundancy approach has been adopted for the BIT circuit design to avoid possible yield loss in case of a malfunctioning test circuitry. The technique has been evaluated on a typical CMOS RF DLNA and simulation results are presented.

Keywords

CMOS integrated circuits; built-in self test; circuit simulation; differential amplifiers; fault diagnosis; integrated circuit testing; integrated circuit yield; low noise amplifiers; radiofrequency amplifiers; radiofrequency integrated circuits; BIT circuit design; CMOS RF DLNA; RF differential low noise amplifier; amplitude alteration; built-in test circuit; catastrophic fault; circuit simulation; digital pass/fail indication signal; malfunctioning test circuitry; parametric fault; radio frequency differential low noise amplifier; triple modular redundancy; yield loss; Built-in-test (BIT); LNA testing; RF testing; design for testability; triple modular redundancy;

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2009.2035417

Filename

5378476