Assignment of carry variables in iterative networks

Both sequential circuits (Fig. 1) and iterative circuits (Figs. 2 and 3) are usually designed by first forming a stable table (flow table) describing the desired circuit performance.1¿3 In this table the various combinations of signals on the feedback or carry leads (corresponding to the internal states of the circuits) are represented by decimal numbers. It is necessary to assign specific combinations of binary signals to these (decimal) states before the actual circuit design can be carried out. This corresponds to the transition from a state table, such as Table I-A to an output table, such as Table I-B. For a given table, different assignments will usually lead to different circuits which can vary significantly in cost. The problem of minimizing the cost of the equipment can be even more important for iterative circuits since each ¿cell¿ occurs many times in the final circuit. The number of different assignments is so large that it is not feasible to try all different assignments for circuits having more than two internal variables.4 This particular problem of discovering assignments which correspond to economical circuits is still unsolved.