DocumentCode :
1381362
Title :
Parallel system design for time-delay neural networks
Author :
Zhang, David ; Pal, Sankar K.
Author_Institution :
Dept. of Comput., Hong Kong Polytech., Kowloon, China
Volume :
30
Issue :
2
fYear :
2000
fDate :
5/1/2000 12:00:00 AM
Firstpage :
265
Lastpage :
275
Abstract :
The authors develop a parallel structure for the time-delay neural network used in some speech recognition applications. The effectiveness of the design is illustrated by: (1) extracting a window computing model from the time-delay neural systems; (2) building its pipelined architecture with parallel or serial processing stages; and (3) applying this parallel window computing to some typical speech recognition systems. An analysis of the complexity of the proposed design shows a greatly reduced complexity while maintaining a high throughput rate
Keywords :
delays; neural net architecture; parallel architectures; pipeline processing; speech recognition; complexity; parallel structure; parallel system design; parallel window computing; pipelined architecture; serial processing stages; speech recognition applications; speech recognition systems; throughput rate; time-delay neural networks; window computing model; Artificial neural networks; Buildings; Computer architecture; Computer networks; Concurrent computing; Delay effects; Neural networks; Speech recognition; Throughput; Windows;
fLanguage :
English
Journal_Title :
Systems, Man, and Cybernetics, Part C: Applications and Reviews, IEEE Transactions on
Publisher :
ieee
ISSN :
1094-6977
Type :
jour
DOI :
10.1109/5326.868447
Filename :
868447
Link To Document :
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