Title :
On Practical Implementation and Generalizations of
Operator for Turbo and LDPC Decoders
Author :
Martina, Maurizio ; Masera, Guido ; Papaharalabos, Stylianos ; Mathiopoulos, P. Takis ; Gioulekas, Fotios
Author_Institution :
Dipt. di Elettron., Politec. di Torino, Torino, Italy
fDate :
4/1/2012 12:00:00 AM
Abstract :
In this paper, we deal with practical implementation issues of the max* operation in generalized form used for decoding of both turbo and low-density-parity-check (LDPC) codes. In particular, first, a unified framework for the so-called generalized max* operation is established, which includes most of the previously published algorithms already known for turbo decoding. Next, the hardware architectures used for the practical implementation of the generalized max* operation, which is derived from this novel framework, are revealed for the first time and further analyzed, in terms of hardware complexity reduction. It is also shown how this generalized max8 operation can be adopted in LDPC decoding, achieving essentially optimal bit error rate performance with small computational complexity against other algorithms in joint turbo-LDPC architectures. This solution is useful in applications where joint decoding architectures are deployed to decode both turbo and LDPC codes. An important example of such application is in software radio receivers of 4G wireless communication systems, such as those proposed in conjunction with the WiMAX standard.
Keywords :
decoding; error statistics; parity check codes; turbo codes; 4G wireless communication systems; LDPC decoders; WiMax standard; computational complexity; generalized max operation; hardware complexity reduction; joint turbo-LDPC architectures; low-density-parity-check codes; optimal bit error rate performance; software radio receivers; turbo decoders; Approximation algorithms; Approximation methods; Bit error rate; Complexity theory; Computer architecture; Decoding; Parity check codes; Iterative decoding; low-density-parity-check (LDPC) codes; maximum a posteriori (MAP) and Log-MAP algorithms; turbo codes; very large scale integration (VLSI) architectures;
Journal_Title :
Instrumentation and Measurement, IEEE Transactions on
DOI :
10.1109/TIM.2011.2173045