Title :
Reducing DRAM Image Data Access Energy Consumption in Video Processing
Author :
Li, Yiran ; Zhang, Tong
Author_Institution :
Dept. of Electr., Comput., & Syst. Eng., Rensselaer Polytech. Inst., Troy, NY, USA
fDate :
4/1/2012 12:00:00 AM
Abstract :
This paper presents domain-specific techniques to reduce DRAM energy consumption for image data access in video processing. In mobile devices, video processing is one of the most energy-hungry tasks, and DRAM image data access energy consumption becomes increasingly dominant in overall video processing system energy consumption. Hence, it is highly desirable to develop domain-specific techniques that can exploit unique image data access characteristics to improve DRAM energy efficiency. Nevertheless, prior efforts on reducing DRAM energy consumption in video processing pale in comparison with that on reducing video processing logic energy consumption. In this work, we first apply three simple yet effective data manipulation techniques that exploit image data spatial/temporal correlation to reduce DRAM image data access energy consumption, then propose a heterogeneous DRAM architecture that can better adapt to unbalanced image access in most video processing to further improve DRAM energy efficiency. DRAM modeling and power estimation have been carried out to evaluate these domain-specific design techniques, and the results show that they can reduce DRAM energy consumption by up to 92%.
Keywords :
DRAM chips; energy conservation; energy consumption; memory architecture; power aware computing; spatiotemporal phenomena; video signal processing; DRAM energy efficiency; DRAM image data access energy consumption reduction; DRAM modeling; data manipulation techniques; domain specific techniques; domain-specific design techniques; domain-specific techniques; energy-hungry tasks; heterogeneous DRAM architecture; mobile devices; power estimation; video processing logic energy consumption; Couplings; Encoding; Energy consumption; Random access memory; Routing; System-on-a-chip; Wires; DRAM energy reduction; heterogeneous DRAM architecture; image data access; image frame buffer recompression; video coding;
Journal_Title :
Multimedia, IEEE Transactions on
DOI :
10.1109/TMM.2011.2177079