• DocumentCode
    1382182
  • Title

    Test efficiency analysis of random self-test of sequential circuits

  • Author

    Sastry, Sarma ; Majumdar, Amitava

  • Author_Institution
    Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA
  • Volume
    10
  • Issue
    3
  • fYear
    1991
  • fDate
    3/1/1991 12:00:00 AM
  • Firstpage
    390
  • Lastpage
    398
  • Abstract
    Motivated by the work of K. Kim et al. (1988) and A. Krasniewski and S. Pilarski (1989), the problem of test efficiency in random testing of sequential circuits using built-in self-test (BIST) techniques is addressed. It is shown that, given a circuit with n primary inputs and the goal of maximizing expected pattern coverage, different pattern-sampling distributions for its 2n possible patterns can be partially ordered. The exact distributions for pattern coverage for both equiprobable and nonequiprobable pattern-sampling distributions are derived. Approximations for pattern-coverage distributions under equiprobable pattern-sampling conditions and corresponding numerical results are presented. A limiting distribution function for pattern-coverage distribution is derived. The authors also present numerical results on confidence levels for obtaining a specified pattern coverage. The distribution for the number of test cycles (R) required to achieve a specified pattern coverage is also derived. The authors derive and use the expression for the expected value of R to illustrate the increase in the effect of achieving a specified coverage j as j increases
  • Keywords
    built-in self test; logic testing; sequential circuits; built-in self-test; confidence levels; equiprobable pattern-sampling conditions; nonequiprobable pattern-sampling distributions; pattern coverage; pattern-sampling distributions; primary inputs; random self-test; sequential circuits; test cycles; test efficiency; Automatic testing; Built-in self-test; Circuit testing; Clocks; Distribution functions; Logic testing; Registers; Sampling methods; Sequential analysis; Sequential circuits;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.67792
  • Filename
    67792