DocumentCode :
1382321
Title :
A Secure Test Wrapper Design Against Internal and Boundary Scan Attacks for Embedded Cores
Author :
Chiu, Geng-Ming ; Li, James Chien-Mo
Author_Institution :
VIP Design, Taipei, Taiwan
Volume :
20
Issue :
1
fYear :
2012
Firstpage :
126
Lastpage :
134
Abstract :
This paper presents a secure test wrapper (STW) design that is compatible with the IEEE 1500 standard. STW protects not only internal scan chains but also primary inputs and outputs, which may contain critical information (such as encryption keys) during the system operation. To reduce the STW area, flip-flops in the wrapper boundary cells also serve as the LFSR to generate the golden key. Experimental results on an AES core show that STW provides very high security at the price of only 5% area overhead with respect to the original IEEE 1500 test wrapper.
Keywords :
design for testability; security; IEEE 1500 standard; boundary scan attacks; embedded cores; internal scan attacks; secure test wrapper design; Computer hacking; Discrete Fourier transforms; Encryption; IP networks; Registers; System-on-a-chip; Design for testability; scan; security;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2010.2089071
Filename :
5639073
Link To Document :
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