Title :
A novel single-device DC method for extraction of the effective mobility and source-drain resistances of fresh and hot-carrier degraded drain-engineered MOSFET´s
Author :
Lou, Choon-Leong ; Chim, Wai-Kin ; Chan, Daniel Siu-Hung ; Pan, Yang
Author_Institution :
Dept. of Electr. Eng., Nat. Univ. of Singapore, Singapore
fDate :
6/1/1998 12:00:00 AM
Abstract :
A new DC technique, the drain current-conductance method (DCCM), has been developed to extract the gate bias dependent effective channel mobility (μeff), and source and drain series resistance (R s and Rd) of drain-engineered MOSFET´s. The extraction of μeff, Re, and Rd by DCCM is based on the DC measurements of drain current and conductance of a single device. The negligible difference between the measured and modeled (using the extracted parameters) linear drain current showed that the DCCM is accurate and effective for devices with different graded junction structures and channel lengths. Asymmetry between Rs and Rd for LDD p-MOSFET´s was found to be more significant than for LATID n-MOSFET´s. This asymmetry has invalidated many methods which utilized the assumptions of Rd=Rs for the extraction of device parameters. The DCCM was further applied to devices with nonuniform hot-carrier degradation. The μeff, Rs, and Rd of LATID n-MOSFET´s degraded under different hot-carrier stress conditions were extracted. The increase in Rd is found to dominate the initial phase of hot-carrier degradation while the decrease in μeff intensifies as the stress duration increases. The extracted parameters have provided physical insight into the asymmetries of graded junctions and degradation mechanisms of hot-carrier stressed MOSFET´s, The DCCM is especially useful for the extraction of SPICE parameters that are usable in circuit and reliability simulation
Keywords :
MOSFET; carrier mobility; electric resistance; hot carriers; parameter estimation; semiconductor device reliability; LATID; SPICE parameters; channel lengths; drain current-conductance method; effective mobility; graded junction structures; hot-carrier degraded drain-engineered MOSFET; linear drain current; nonuniform hot-carrier degradation; reliability simulation; single-device DC method; source-drain resistances; stress duration; Current measurement; Degradation; Electrical resistance measurement; Failure analysis; Hot carrier effects; Hot carriers; Integrated circuit reliability; MOSFET circuits; Rain; Stress;
Journal_Title :
Electron Devices, IEEE Transactions on