Sub-50-nm $\hbox {In}_{0.7}\hbox {Ga}_{0.3}\hbox {As}$ MOSFETs With Various Barrier Layer Materials

Sub-50-nm In_0.7Ga_0.3As MOSFETs with high-k dielectric Al₂O₃ have been demonstrated and investigated. The device performance of buried-channel In_0.7Ga_0.3As MOSFETs with various barrier layer materials (i.e., InP and InAlAs) has been analyzed and compared to that of devices without a barrier layer. The 40-nm-gate-length In_0.7Ga_0.3 As MOSFETs with InP/InAlAs barrier exhibit a subthreshold swing of 130 mV/dec, a drain-induced barrier lowering of 174 mV/V, and an extrinsic transconductance of 570 mS/mm at V_ds = 1 V. Scaling behaviors of buried-channel In_0.7Ga_0.3As MOSFETs with and without a barrier layer material have also been analyzed.