Capacitance reconstruction from measured C-V in high leakage, nitride/oxide MOS

Author

Choi, Chang-Hoon ; Wu, Yider ; Goo, Jung-Suk ; Yu, Zhiping ; Dutton, Robert W.

Author_Institution

Center for Integrated Syst., Stanford Univ., CA, USA

Volume

47

Issue

10

fYear

2000

fDate

10/1/2000 12:00:00 AM

Firstpage

1843

Lastpage

1850

Abstract

A reconstruction technique of the gate capacitance from anomalous capacitance-voltage (C-V) curves in high leakage dielectric MOSFETs is presented. An RC network is used to accommodate the distributed nature of MOSFETs and an optimization technique is applied to extract the intrinsic gate capacitance. Applicability of the method is demonstrated for ultra-thin nitride/oxide (N/O ~1.4 nm/0.7 nm) composite dielectric MOSFETs

Keywords

MOSFET; capacitance; dielectric thin films; equivalent circuits; leakage currents; optimisation; semiconductor device models; tunnelling; 0.7 nm; 1.4 nm; RC network; anomalous C-V curves; capacitance reconstruction; capacitance-voltage curves; gate capacitance; high leakage dielectric MOSFETs; high leakage nitride/oxide MOS; measured C-V; optimization technique; ultra-thin nitride/oxide structure; CMOS technology; Capacitance measurement; Capacitance-voltage characteristics; Circuits; Dielectric measurements; Electrical resistance measurement; MOSFETs; Parasitic capacitance; Thickness measurement; Tunneling;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.870559

Filename

870559