Monte Carlo simulation of the CHISEL flash memory cell

Author

Bude, Jeff D. ; Pinto, Mark R. ; Smith, R. Kent

Author_Institution

Lucent Technol. Bell Labs., Murray Hill, NJ, USA

Volume

47

Issue

10

fYear

2000

fDate

10/1/2000 12:00:00 AM

Firstpage

1873

Lastpage

1881

Abstract

This work shows how physically-based hot carrier simulation was used to understand the importance of CHannel Initiated Secondary ELectron (CHISEL) injection in scaled MOSFETs, and how it was used to develop a powerful CHISEL-based technique for low voltage flash programming. Furthermore, it is shown how CHISEL flash addresses many of the disadvantages of CHE programming techniques, making it an ideal candidate for low-voltage, low-power Gigabit flash memories

Keywords

MOS memory circuits; MOSFET; Monte Carlo methods; PLD programming; flash memories; hot carriers; low-power electronics; semiconductor device models; CHISEL flash memory cell; CHISEL-based technique; LV gigabit flash memories; Monte Carlo simulation; channel initiated secondary electron injection; low voltage flash programming; low-power flash memories; low-voltage flash memories; physically-based hot carrier simulation; scaled MOSFETs; Channel hot electron injection; Dielectrics and electrical insulation; Flash memory; Flash memory cells; Hot carriers; Low voltage; MOSFETs; Nonvolatile memory; Semiconductor memory; Temperature control;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.870565

Filename

870565