New programming and erasing schemes for p-channel flash memory

Author

Park, Jong T. ; Chun, Jeoung Y. ; Kim, Han K. ; Jang, Sung J. ; Yu, Chong G.

Author_Institution

Dept. of Electron. Eng., Inchon Univ., South Korea

Volume

21

Issue

10

fYear

2000

Firstpage

491

Lastpage

493

Abstract

In this work, a new programming scheme using a forward substrate bias during BBHE injection and a two-step erasing scheme has been suggested to improve the performances of p-channel flash memory. It has been found that applying a forward substrate bias increases the electron injection efficiency and improves the cell´s endurance characteristics. The two-step erasing scheme, where a channel erase cycle is added after the source erase operation, is found to reduce the gate current degradation and also to improve the cell´s endurance characteristics.

Keywords

flash memories; hot carriers; integrated circuit reliability; tunneling; BBHE injection; channel erase cycle; electron injection efficiency; endurance characteristics; forward substrate bias; gate current degradation; p-channel flash memory; programming schemes; source erase operation; two-step erasing scheme; Channel hot electron injection; Charge carrier processes; Degradation; Flash memory; Hot carriers; Nonvolatile memory; Scalability; Solids; Substrate hot electron injection; Tunneling;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.870611

Filename

870611