Design of a sense circuit for low-voltage flash memories

Author

Tanzawa, Toru ; Takano, Yoshinori ; Taura, Tadayuki ; Atsumi, Shigeru

Author_Institution

Memory LSI R&D Center, Toshiba Corp., Yokohama, Japan

Volume

35

Issue

10

fYear

2000

Firstpage

1415

Lastpage

1421

Abstract

A new sense circuit directly sensing the bitline voltage is proposed for low-voltage flash memories. A simple reference voltage generation method and a dataline switching method with matching of the stray capacitance between the dataline pairs are also proposed. A design method for the bitline clamp load transistors is described, taking bitline charging speed and process margins into account. The sense circuit was implemented in a 32-Mb flash memory fabricated with a 0.25-/spl mu/m flash memory process and successfully operated at a low voltage of 1.5 V.

Keywords

capacitance; flash memories; integrated circuit design; low-power electronics; 0.25 micron; 1.5 V; 32 Mbit; bitline charging speed; bitline clamp load transistors; bitline voltage; dataline pairs; dataline switching method; flash memory process; low-voltage flash memories; process margins; reference voltage generation method; sense circuit; stray capacitance; Capacitance; Charge pumps; Circuit noise; Clamps; Delay; Design methodology; Flash memory; Low voltage; Threshold voltage; Transconductance;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.871317

Filename

871317