Title :
Hardware emulation of multi-level decision feedback equalization
Author :
Schmid, Volker ; Sands, Nicholas P.
Author_Institution :
Philips Semiconductors, Sunnyvale, CA, USA
fDate :
9/1/1996 12:00:00 AM
Abstract :
The bit error rate (BER) performance of a multi-level decision feedback equalizer (MDFE) for a magnetic recording channel is evaluated. The unique equalization scheme designed for 2/3(1,7) RLL codes was emulated on the RAM-DFE IC. Measurements with a synchronous clock at 54 Msps demonstrated that raising the inner target levels improves the performance considerably. It was found that MDFE outperforms conventional DFE at the same symbol density of PW50=2.5 T and yields similar performance at the same user density of 1.78
Keywords :
Gaussian noise; clocks; decision feedback equalisers; magnetic recording noise; runlength codes; white noise; 2/3(1,7) RLL codes; MDFE; RAM-DFE IC; bit error rate performance; hardware emulation; inner target levels; magnetic recording channel; multi-level decision feedback equalization; symbol density; synchronous clock; user density; Bit error rate; Clocks; Decision feedback equalizers; Emulation; Finite impulse response filter; Hardware; Intersymbol interference; Magnetic heads; Magnetic recording; Nonlinear filters;
Journal_Title :
Magnetics, IEEE Transactions on