Title :
Testable design of multiple-stage OTA-C filters
Author :
Hsu, Cheng-Chung ; Feng, Wu-Shiung
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
10/1/2000 12:00:00 AM
Abstract :
This paper presents a novel design and test methodology to increase the testability of multistage operational transconductance amplifier and grounded capacitor (OTA-C) filters. As assumed herein, a fault can cause the value of a passive circuit component to deviate from its normal value in order to detect such faults. This deviation causes open-circuit and/or short-circuit effects or changes the operating characteristics of the active components. That is, the catastrophic and parameter deviation faults are considered in this paper. The proposed methodology is also effective in detecting single and multiple faults. Simulation results for the faulty and fault-free circuits are compared to verify the feasibility of our design-for-testability (DFT) structure. The physical layout of a third-order Butterworth OTA-C filter is implemented by the TANNER layout tool. The extra hardware overhead to make the OTA-C filters testable is less than 9%, which is quite a reasonable value for analogue circuits
Keywords :
Butterworth filters; application specific integrated circuits; circuit CAD; design for testability; fault diagnosis; integrated circuit layout; operational amplifiers; TANNER layout tool; analogue circuits; design-for-testability structure; fault; grounded capacitor filters; multiple faults; multiple-stage OTA-C filters; multistage operational transconductance amplifier; single faults; testable design; third-order Butterworth OTA-C filter; Capacitors; Circuit faults; Circuit testing; Design methodology; Electrical fault detection; Fault detection; Filters; Operational amplifiers; Passive circuits; Transconductance;
Journal_Title :
Instrumentation and Measurement, IEEE Transactions on