On the size of PLAs required to realize binary and multiple-valued functions

Author

Bender, Edward A. ; Butler, Jon T.

Author_Institution

Dept. of Math., California Univ., La Jolla, CA, USA

Volume

38

Issue

1

fYear

1989

fDate

1/1/1989 12:00:00 AM

Firstpage

82

Lastpage

98

Abstract

Upper and lower bounds are shown for the average number of product terms required in the minimal realization, as a function of the number of nonzero output values. The variance, in addition to the bounds, allows conclusions to be drawn about how PLA size determines the set of realizable functions. Although the bounds are most accurate when there are few nonzero values, they are adequate for analyzing commercially available PLAs. The analysis shows that, for all but one commercially available PLA, the number of nonzero values is a statistically meaningful criterion for determining whether or not a given function is likely to be realized

Keywords

logic arrays; logic design; minimisation of switching nets; switching functions; PLA size; lower bounds; multiple-valued functions; nonzero output values; product terms; realizable functions; upper bounds; variance; Charge coupled devices; Circuit analysis; Decoding; Logic circuits; Logic design; Mathematics; Performance analysis; Programmable logic arrays; Upper bound; Very large scale integration;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/12.8731

Filename

8731