• DocumentCode
    1390965
  • Title

    Analogue squarer and multiplier based on floating-gate MOS transistors

  • Author

    Vlassis, S. ; Siskos, S.

  • Author_Institution
    Dept. of Phys., Aristotelian Univ. of Thessaloniki, Greece
  • Volume
    34
  • Issue
    9
  • fYear
    1998
  • fDate
    4/30/1998 12:00:00 AM
  • Firstpage
    825
  • Lastpage
    826
  • Abstract
    A simple squarer based on floating-gate MOS transistors is presented. The squarer has rail-to-rail input range with less than 0.5% non-linearity error. Using this squarer single-ended and/or differential signals can be processed without additional circuitry. Also, a four quadrant analogue multiplier can be realised using the proposed squarer. Simulation results are given to verify the theoretical analysis
  • Keywords
    CMOS analogue integrated circuits; analogue multipliers; analogue processing circuits; CMOS; analogue squarer; differential signals; floating-gate MOS transistors; four quadrant analogue multiplier; nonlinearity error; rail-to-rail input range; single-ended signals;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19980639
  • Filename
    682786
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1390965