• DocumentCode
    1390967
  • Title

    A Built-in Method to Repair SoC RAMs in Parallel

  • Author

    Tseng, Tsu-Wei ; Li, Jin-Fu ; Hou, Chih-Sheng

  • Author_Institution
    Nat. Central Univ., Jhongli, Taiwan
  • Volume
    27
  • Issue
    6
  • fYear
    2010
  • Firstpage
    46
  • Lastpage
    57
  • Abstract
    Built-in-self-repair is an enabling approach for improving memory yield in system-on-chip designs. Reducing the overhead of repair circuits while minimizing the test and repair time is of prime importance. This article presents a fast parallel repair methodology for SoC memory cores and an associated automation framework.
  • Keywords
    built-in self test; circuit optimisation; memory architecture; parallel architectures; random-access storage; system-on-chip; RAM; SoC; built-in-self-repair; memory core; parallel repair methodology; system-on-chip design; Built-in self-test; Circuit faults; Maintenance engineering; Random access memory; Redundancy; Routing; System-on-a-chip; SoC; built-in self-repair; design and test; embedded memories; redundancy analysis; yield improvement;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2010.121
  • Filename
    5648494
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1390967