Cycle saving hardware for real-time audio processing

The authors present a design for cycle saving hardware components that enable real-time operation of audio coder-decoders. To determine the key components of audio coding algorithms, the MPEG2 audio algorithm is analysed, which is an international standard and uses a mixture of several coding strategies. Through the analysis, some components are selected that significantly contribute to the total number of cycles, and corresponding hardware accelerators that complete assigned tasks in a single cycle are designed. By incorporating these accelerators, a simple processor can reduce the number of cycles for assigned tasks by up to 72.2%