DocumentCode :
1391495
Title :
An Experimental Power-Lines Model for Digital ASICs Based on Transmission Lines
Author :
Costagliola, M. ; de Caro, D. ; Girardi, A. ; Izzi, R. ; Rinaldi, N. ; Spirito, M. ; Spirito, P.
Author_Institution :
Dept. of Electron. & Telecommun. Eng., Univ. of Naples Federico II, Naples, Italy
Volume :
20
Issue :
1
fYear :
2012
Firstpage :
162
Lastpage :
166
Abstract :
In this paper, we present a transmission-line-based model developed to accurately describe the power and ground-line interconnections of modern digital ASICs. The proposed model employs transmission lines as the core component to properly describe both the capacitive and inductive behavior of the metal lines. In addition, the nonlinear frequency dependence of the line resistance, due to the skin-effect, is modeled with an additional lumped model. The model is completely derived from measurement data and allows describing both in-house and third-party ASICs. High-frequency S -parameter measured data are used to benchmark the model. Finally, on-board voltage measurements of a Numonyx 64 Mbit flash memory are performed and compared with transistor-level simulations.
Keywords :
S-parameters; application specific integrated circuits; flash memories; integrated circuit interconnections; transmission lines; voltage measurement; S -parameter; digital ASIC; flash memory; ground-line interconnections; line resistance; lumped model; nonlinear frequency dependence; on-board voltage measurements; power-lines model; skin effect; transmission lines; Ash; Data models; Impedance; Integrated circuit modeling; Load modeling; Switches; Transmission line measurements; Interconnections; power bounce; signal integrity;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2010.2090368
Filename :
5648762
Link To Document :
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