DocumentCode :
1392392
Title :
Design of compound buried layer SOI high voltage device with double windows
Author :
Hu, S.D. ; Luo, X.R. ; Zhang, Boming ; Li, Z.J.
Author_Institution :
State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Volume :
46
Issue :
1
fYear :
2010
Firstpage :
82
Lastpage :
84
Abstract :
Based on theoretical and experimental investigation of a compound buried layer SOI with a single window in the upper buried oxide layer (SWCBL SOI), further research on the compound buried layer SOI with double windows (DWCBL SOI) is proposed. Higher concentration interface holes under the drain more effectively enhance the electric field of the lower buried oxide layer, resulting in a higher breakdown voltage (BV) of the device. With the same thicknesses of 20 ??m top silicon layer and 3 ??m buried oxide layer, the BV of the DWCBL increases to 1040 from 798 V of the SWCBL and 622 V of the conventional SOI, maintaining the low self-heating effect.
Keywords :
MOSFET; buried layers; semiconductor device breakdown; silicon-on-insulator; DWCBL; SOI high voltage device; SWCBL; Si-SiO2; breakdown voltage; interface holes; self-heating effect; silicon on insulator; size 20 mum; size 3 mum; top silicon layer; upper buried oxide layer; voltage 1040 V; voltage 622 V; voltage 798 V;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2010.1945
Filename :
5395584
Link To Document :
بازگشت