• DocumentCode
    1392807
  • Title

    Phase locking scheme based on look-up-table-assisted sliding discrete fourier transform for low-frequency power and acoustic signals

  • Author

    Sumathi, P. ; Janakiraman, P.A.

  • Author_Institution
    Dept. of Electr. Eng., Indian Inst. of Technol. Roorkee, Roorkee, India
  • Volume
    5
  • Issue
    6
  • fYear
    2011
  • fDate
    11/1/2011 12:00:00 AM
  • Firstpage
    494
  • Lastpage
    504
  • Abstract
    The frequency tracking performance of sliding discrete Fourier transform (SDFT)-based phase locking (PLL) scheme has been improved by supplementing a cosine look-up table (cLUT) loop. Since the SDFT algorithm is marginally stable, to avoid instability, a damping factor is introduced, which causes the steady-state error in the PLL behaviour. The addition of cLUT indirectly strengthens cosine component of SDFT output and eliminates the effect of damping factor. Consequently, the numerically controlled oscillator (NCO) yields accurate sampling frequency, and it could be utilised to generate unit sine and cosine reference signals, synchronous with the periodic input signal in power system applications. A mathematical model of the look-up table (LUT) assisted SDFT-based PLL has been developed to analyse the transient and steady-state behaviour and it substantiates the improvement in steady-state performance. The PLL exhibits second order under damped response resulting in faster acquisition and small reduction in pull-in range with zero steady-state error. The improvement in performance of the LUT-assisted SDFT PLL is investigated by simulation and experimental studies.
  • Keywords
    damping; discrete Fourier transforms; electronic engineering computing; oscillators; phase locked loops; table lookup; LUT-assisted SDFT PLL; SDFT algorithm; SDFT-based phase locking scheme; acoustic signal; cosine look-up table loop; cosine reference signal; damping factor; frequency tracking performance; look-up-table-assisted sliding discrete Fourier transform; low-frequency power signal; numerically controlled oscillator; phase locking scheme; sampling frequency; sine reference signal; sliding discrete Fourier transform; steady-state property; zero steady-state error;
  • fLanguage
    English
  • Journal_Title
    Circuits, Devices & Systems, IET
  • Publisher
    iet
  • ISSN
    1751-858X
  • Type

    jour

  • DOI
    10.1049/iet-cds.2010.0323
  • Filename
    6096990