DocumentCode :
1392981
Title :
Congestion minimization during placement
Author :
Wang, Maogang ; Yang, Xiaojian ; Sarrafzadeh, Majid
Author_Institution :
Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA
Volume :
19
Issue :
10
fYear :
2000
fDate :
10/1/2000 12:00:00 AM
Firstpage :
1140
Lastpage :
1148
Abstract :
Typical placement objectives involve reducing net-cut cost or minimizing wirelength. Congestion minimization is the least understood, however, it models routability most accurately. In this paper, we study the congestion minimization problem during placement. First, we show that a global placement with minimum wirelength has minimum total congestion. We show that minimizing wirelength may (and in general, will) create locally congested regions. We test seven different congestion minimization objectives. We also propose a post processing stage to minimize congestion. Our main contribution and results can be summarized as follows. (1) Among a variety of cost functions and methods for congestion minimization (including several currently used in industry), wirelength alone followed by a post processing congestion minimization works the best and is one of the fastest. (2) Cost functions such as a hybrid length plus congestion (commonly believed to be very effective) do not always work very well. (3) Net-centric post-processing techniques are among the best congestion alleviation approaches. (4) Congestion at the global placement level, correlates well with congestion of detailed placement
Keywords :
VLSI; circuit layout CAD; circuit optimisation; integrated circuit layout; network routing; wiring; IC layout; congestion minimization; cost functions; locally congested regions; minimum wirelength; net-centric post-processing; placement; post processing stage; routability; Circuits; Cost function; Design optimization; Large-scale systems; Minimization methods; Routing; Testing; Very large scale integration; Wires; Wiring;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.875296
Filename :
875296
Link To Document :
بازگشت