DocumentCode :
1393082
Title :
A temperature-aware simulation environment for reliable ULSI chip design
Author :
Cheng, Yi-Kan ; Kang, Sung-Mo
Author_Institution :
Somerset Design Center, Motorola Inc., Austin, TX, USA
Volume :
19
Issue :
10
fYear :
2000
fDate :
10/1/2000 12:00:00 AM
Firstpage :
1211
Lastpage :
1220
Abstract :
In this paper, we present a temperature-aware simulation environment, iTAS, which has been developed for the design of thermally reliable ultra-large scale integrated (ULSI) chips. This environment provides advisory information from the early chip design phase to the post-layout analysis phase. Several important applications, including temperature-sensitive timing analysis, efficient on-chip hot-spot identification, and thermally reliable package design are addressed, iTAS can be used not only for reliability checking, but also for better thermal engineering to enhance the overall chip performance
Keywords :
ULSI; circuit simulation; integrated circuit design; integrated circuit reliability; thermal analysis; timing; IC design; ULSI; iTAS; on-chip hot-spot identification; overall chip performance; post-layout analysis phase; temperature-aware simulation environment; temperature-sensitive timing analysis; thermal engineering; thermal reliability; Chip scale packaging; Electrothermal effects; Integrated circuit reliability; Performance analysis; Power engineering and energy; Temperature distribution; Thermal engineering; Timing; Ultra large scale integration; Very large scale integration;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.875333
Filename :
875333
Link To Document :
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