FDSOI Process Technology for Subthreshold-Operation Ultralow-Power Electronics

Author

Vitale, Steven A. ; Wyatt, Peter W. ; Checka, Nisha ; Kedzierski, Jakub ; Keast, Craig L.

Author_Institution

Solid State Technol. Div., Massachusetts Inst. of Technol., Lexington, MA, USA

Volume

98

Issue

2

fYear

2010

Firstpage

333

Lastpage

342

Abstract

Ultralow-power electronics will expand the technological capability of handheld and wireless devices by dramatically improving battery life and portability. In addition to innovative low-power design techniques, a complementary process technology is required to enable the highest performance devices possible while maintaining extremely low power consumption. Transistors optimized for subthreshold operation at 0.3 V may achieve a 97% reduction in switching energy compared to conventional transistors. The process technology described in this article takes advantage of the capacitance and performance benefits of thin-body silicon-on-insulator devices, combined with a workfunction engineered mid-gap metal gate.

Keywords

low-power electronics; power electronics; silicon-on-insulator; transistors; FDSOI process technology; innovative low-power design techniques; low power consumption; mid-gap metal gate; subthreshold-operation ultralow-power electronics; switching energy; thin-body silicon-on-insulator devices; voltage 0.3 V; wireless devices; Application specific integrated circuits; Batteries; Biosensors; Capacitance; Energy consumption; Integrated circuit technology; MOS devices; Sensor systems; Silicon on insulator technology; Voltage; Low power; metal gate; silicon-on-insulator (SOI); subthreshold;

fLanguage

English

Journal_Title

Proceedings of the IEEE

Publisher

ieee

ISSN

0018-9219

Type

jour

DOI

10.1109/JPROC.2009.2034476

Filename

5395759