Reconfigurable RF PWM PA architecture for efficiency enhancement at power back-off

Author

Francois, B. ; Reynaert, Patrick

Author_Institution

Dept. of Eng., Univ. of Leuven (KU Leuven), Leuven, Belgium

fYear

2014

fDate

2-4 April 2014

Firstpage

1

Lastpage

3

Abstract

A transformer-combined fully-integrated reconfigurable RF PA architecture for fully digital transmitters is proposed. The RF PA dynamically switches between several modes in order to achieve efficiency enhancement at power back-off and simultaneously producing a multi-level RF PWM signal. Multilevel RF PWM is realized by driving one or two power amplifiers (PAs) with a PWM signal, while the others are turned off or working at full power. This architecture is implemented in a 40nm standard CMOS technology where the PAE at 15dB back-off from the peak power is still 17% PAE while achieving 27% PAE at peak with 31.5 dBm peak output power. Therefore, this architecture is almost 3.5 times more efficient than a conventional class B architecture at power back-off.

Keywords

CMOS integrated circuits; pulse width modulation; radio transmitters; radiofrequency power amplifiers; efficiency 17 percent; efficiency 27 percent; efficiency enhancement; fully digital transmitters; multilevel RF PWM signal; power amplifiers; power backoff; reconfigurable RF PWM PA architecture; size 40 nm; standard CMOS technology; CMOS integrated circuits; Power amplifiers; Power generation; Pulse width modulation; Radio frequency; Transistors; Windings; PWM; RF PA; RF PWM; digital; efficiency enhancement; multi-level; multi-mode; reconfigurable;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Nonlinear Microwave and Millimetre-wave Circuits (INMMiC), 2014 International Workshop on

Conference_Location

Leuven

Type

conf

DOI

10.1109/INMMIC.2014.6815090

Filename

6815090