Overflow handling in inner-product processors

In complemented coded arithmetic, overflow can occur and the final result could be incorrect. We present in this brief an extended precision technique to carry out chained additions without error using a datapath whose width is minimum, dictated only by the required precision, not the prevention of overflow. The technique is based on the use of an up/down counter that is controlled by overflow conditions after each add operation. The proposed technique is superior to traditional approaches of controlling overflow since it does not require extending the width of the datapath or limiting the dynamic range of data. We illustrate how the technique is used in three hardware structures that perform the inner-product operation