DocumentCode :
1395251
Title :
Thermal stability of CoSi2 film for CMOS salicide
Author :
Ohguro, Tatsuya ; Saito, Masanobu ; Morifuji, Eiji ; Yoshitomi, Takashi ; Morimoto, Toyota ; Momose, Hisayo Sasaki ; Katsumata, Yasuhiro ; Iwai, Hiroshi
Author_Institution :
Toshiba Corp., Yokohama, Japan
Volume :
47
Issue :
11
fYear :
2000
fDate :
11/1/2000 12:00:00 AM
Firstpage :
2208
Lastpage :
2213
Abstract :
We describe the relationship between the sheet resistance of Co-silicided poly-Si and various doping elements. The surface condition of the poly-Si before Co sputtering plays an important role in suppressing the “narrow line effect,” in which the silicide sheet resistance degrades as the gate length decreases. Si-O and Si-C bonding takes place in the gate poly-Si during RIE processing for gate side-wall formation when there is no CVD SiO2 gate cap. This leads to the sheet resistance degradation of CoS2 when the gate length is reduced. The degradation becomes less severe as the weight of the ions implanted during gate poly-Si doping increases, because the bonding is inhibited by heavier ions. The best way to suppress this degradation, however, is to prevent exposure of gate poly-Si surface by implementing a CVD SiO2 cap during gate side-wall formation. When this is done, the sheet resistance degradation does not occur even when the gate length is 0.1 μm for all types of implanted ions. We also observed thermal stability of the sheet resistance up to 1000°C. That can be improved, as well as narrow line effect, by using this cap process. However, the thermal stability of gate oxide TDDB depends on the type of ion implantation. The temperature at which degradation of TDDB begins rises as the weight of the implanted ions increased. This degradation depends on the grain size, and grains increase in size as the weight increases. The highest temperature before the onset of TDDB degradation is seen with in-situ phosphorus-doped n+ polysilicon, because the grain size is greatest in this case
Keywords :
CMOS integrated circuits; cobalt compounds; integrated circuit metallisation; ion implantation; thermal stability; 0.1 micron; 1000 C; CMOS salicide; CVD SiO2 cap; CoSi2; CoSi2 film; RIE processing; TDDB; gate oxide; grain size; ion implantation; narrow line effect; polysilicon doping; sheet resistance; thermal stability; Bonding; Doping; Grain size; Silicides; Sputtering; Surface resistance; Temperature; Thermal degradation; Thermal resistance; Thermal stability;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.877185
Filename :
877185
Link To Document :
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