• DocumentCode
    1395558
  • Title

    Modeling circuit parasitics. II

  • Author

    Wadell, Brian C.

  • Volume
    1
  • Issue
    2
  • fYear
    1998
  • fDate
    6/1/1998 12:00:00 AM
  • Firstpage
    6
  • Lastpage
    8
  • Abstract
    In the previous part the author introduced zero-length models for circuit parasitics (i.e., lumped elements) and showed how one can estimate the resistance of conductors and dielectrics. In this installment he looks at inductive parasitics and considers the following topics: component leads; PCB traces; vias; and other inductive parasitics
  • Keywords
    circuit theory; conductors (electric); inductance; inductors; modelling; printed circuits; PCB traces; circuit parasitics; component leads; inductive parasitics; lumped elements; vias; zero-length models; Capacitors; Circuits; Connectors; Inductance; Inductors; Laser beam cutting; Lead; Resistors; Voltage; Wire;
  • fLanguage
    English
  • Journal_Title
    Instrumentation & Measurement Magazine, IEEE
  • Publisher
    ieee
  • ISSN
    1094-6969
  • Type

    jour

  • DOI
    10.1109/5289.685491
  • Filename
    685491
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1395558