Cost-Effective Silicon Vertical Diode Switch for Next-Generation Memory Devices

Author

Lee, Kong-Soo ; Han, Jae-Jong ; Lim, Hanjin ; Nam, Seokwoo ; Chung, Chilhee ; Jeong, Hong-Sik ; Park, Hyunho ; Jeong, Hanwook ; Choi, Byoungdeog

Author_Institution

Semicond. R&D Div., Samsung Electron. Co., Ltd., Hwasung, South Korea

Volume

33

Issue

2

fYear

2012

Firstpage

242

Lastpage

244

Abstract

In this letter, a cost-effective vertical diode scheme for next-generation memory devices, including phase-change memories (PCMs), is realized. After the contact formation for diodes with only one mask layer, an amorphous silicon (a-Si) film was deposited within the contacts using SiH₄ ramp-up ambient in a conventional batch-type furnace in order to minimize the growth of native oxide. A deposition/etch-back/deposition scheme enabled us to achieve robust vertical diodes without any seams or interfacial oxide layer within the vertical diode pillars. Subsequent annealing at 600 ^°C provided solid-phase epitaxial alignment of the a-Si layer. An ideality factor revealed that the new scheme provided noticeable crystallinity of the silicon diodes. Moreover, the electrical characteristics of the diodes verified that the scheme was suitable for full operation of PCM devices.

Keywords

annealing; etching; phase change memories; semiconductor diodes; semiconductor switches; solid phase epitaxial growth; Si; amorphous silicon film; annealing; contact formation; cost effective vertical diode switch; deposition-etch-back deposition scheme; next generation memory devices; phase change memory; solid phase epitaxial alignment; temperature 600 C; Epitaxial growth; Phase change materials; Random access memory; Semiconductor diodes; Silicon; Substrates; Switches; $hbox{SiH}_{4}$ ramp-up; Phase-change memory (PCM); solid-phase epitaxy (SPE); vertical diode switch;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2011.2175358

Filename

6101554