DocumentCode :
1396869
Title :
Shift registers containing transistors in each stage
Author :
Szarvas, G.
Author_Institution :
Telefonaktiebolaget L.M. Ericsson, Stockholm, Sweden
Volume :
106
Issue :
18
fYear :
1959
fDate :
5/1/1959 12:00:00 AM
Firstpage :
1277
Lastpage :
1284
Abstract :
After a discussion of the logical requirements several possible and practical types of shift registers are considered, e.g. shift registers containing blocking oscillators and square-loop ferrite cores as memory elements, shift registers containing blocking oscillators and short-time memory elements, and shift registers containing hook flip-flops and short-time memory elements. The maximum trigger frequencies of the types discussed are 200¿300 kc/s, and usually two stages per digit are required. Possibilities of achieving one stage per digit will be considered.
Keywords :
circuits and sub-assemblies; pulse circuits;
fLanguage :
English
Journal_Title :
Proceedings of the IEE - Part B: Electronic and Communication Engineering
Publisher :
iet
ISSN :
0369-8890
Type :
jour
DOI :
10.1049/pi-b-2.1959.0232
Filename :
5243932
Link To Document :
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