Title :
Address Translation Aware Memory Consistency
Author :
Romanescu, Bogdan F. ; Lebeck, Alvin R. ; Sorin, Daniel J.
Abstract :
Computer systems with virtual memory are susceptible to design bugs and runtime faults in their address translation systems. Detecting bugs and faults requires a clear specification of correct behavior. A new framework for address translation aware memory consistency models addresses this need.
Keywords :
program debugging; virtual storage; address translation aware memory consistency; bug detection; computer system; design bug; runtime fault; virtual memory; Memory consistency; address translation; dynamic verification; virtual memory;
Journal_Title :
Micro, IEEE