DocumentCode
1398406
Title
CHOP: Integrating DRAM Caches for CMP Server Platforms
Author
Jiang, Xiaowei ; Madan, Niti ; Zhao, Li ; Upton, Mike ; Iyer, Ravi ; Makineni, Srihari ; Newell, Donald ; Solihin, Yan ; Balasubramonian, Rajeev
Volume
31
Issue
1
fYear
2011
Firstpage
99
Lastpage
108
Abstract
Integrating large DRAM caches is a promising way to address the memory bandwidth wall issue in the many-core era. However, organizing and implementing a large DRAM cache imposes a trade-off between tag space overhead and memory bandwidth consumption. CHOP (Caching Hot Pages) addresses this trade-off through three filter-based DRAM-caching techniques.
Keywords
DRAM chips; cache storage; CHOP; CMP server; caching hot pages; filter-based DRAM-caching techniques; many-core era; memory bandwidth; tag space; CHOP; DRAM; cache memories; emerging technologies; filter cache; hardware; hot pages; memory hierarchy;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.2010.100
Filename
5661754
Link To Document