Title :
Test pattern generation for logic crosstalk faults in VLSI circuits
Author :
Rubio, A. ; Sainz, J.A. ; Kinoshita, K.
Author_Institution :
Dept. of Phys., Univ. of the Illes Balears, Palma, Spain
fDate :
4/1/1991 12:00:00 AM
Abstract :
Investigates test pattern generation (TPG) for logic circuits in which transient logic errors are likely to be produced by crosstalk interference between nodes. Algebraic and algorithmic approaches for TPG of combinational circuits are presented and applied to several example circuits
Keywords :
VLSI; combinatorial circuits; crosstalk; fault location; integrated logic circuits; logic testing; TPG; VLSI circuits; combinational circuits; crosstalk interference; logic circuits; logic crosstalk faults; test pattern generation; transient logic errors;
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings G
