CMOS VLSI design of a high-speed Fermat number transform based convolver/correlator using three-input adders

Three-input addition, modulo a Fermat number F_t, is investigated and a VLSI circuit for a modulo F₄ three-input adder is proposed, and used in the CMOS VLSI design of a high-speed Fermat number transform (FNT) convolver/correlator. It is shown that, by using three-input modulo F_t addition, substantial improvements in the performances of both the modulo F_t multiplier and the FNT/IFNT transformer are achieved. It is also shown that, by sectioning the pipeline transformer, an improved design flexibility is obtained and the problem of the area required to implement a whole 64-point F₄ pipeline FNT transformer in CMOS technology is overcome. The resulting design comprises one complete section of a 64-point pipeline FNT transformer that can be programmed to work at any point in a forward or inverse pipeline. Therefore, only a single design is necessary, a set of which is cascaded with a multiplier to build the complete pipeline convolver/correlator