DocumentCode
1399286
Title
Design of Fixed-Width Multipliers With Linear Compensation Function
Author
Petra, Nicola ; Caro, Davide De ; Garofalo, Valeria ; Napoli, Ettore ; Strollo, Antonio Giuseppe Maria
Author_Institution
Dept. of Electron. & Telecommun. Eng., Univ. of Napoli Federico II, Naples, Italy
Volume
58
Issue
5
fYear
2011
fDate
5/1/2011 12:00:00 AM
Firstpage
947
Lastpage
960
Abstract
This paper focuses on fixed-width multipliers with linear compensation function by investigating in detail the effect of coefficients quantization. New fixed-width multiplier topologies, with different accuracy versus hardware complexity trade-off, are obtained by varying the quantization scheme. Two topologies are in particular selected as the most effective ones. The first one is based on a uniform coefficient quantization, while the second topology uses a nonuniform quantization scheme. The novel fixed-width multiplier topologies exhibit better accuracy with respect to previous solutions, close to the theoretical lower bound.
Keywords
compensation; integrated circuit design; multiplying circuits; network topology; fixed-width multipliers; hardware complexity; linear compensation function; second topology; uniform coefficient quantization; Accuracy; Complexity theory; Hardware; Integrated circuits; Mean square error methods; Quantization; Topology; Digital arithmetic; FIR filters; error analysis; error compensation; fixed-width multipliers; least mean square method; multiplication;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2010.2090572
Filename
5661879
Link To Document