DocumentCode :
1399421
Title :
Multiterminal Memristive Nanowire Devices for Logic and Memory Applications: A Review
Author :
Sacchetto, Davide ; De Micheli, Giovanni ; Leblebici, Yusuf
Author_Institution :
Ecole Polytech. Fed. de Lausanne (EPFL), Lausanne, Switzerland
Volume :
100
Issue :
6
fYear :
2012
fDate :
6/1/2012 12:00:00 AM
Firstpage :
2008
Lastpage :
2020
Abstract :
Memristive devices have the potential for a complete renewal of the electron devices landscape, including memory, logic, and sensing applications. This is especially true when considering that the memristive functionality is not limited to two-terminal devices, whose practical realization has been demonstrated within a broad range of different technologies. For electron devices, the memristive functionality can be generally attributed to a material state modification, whose dynamics can be engineered to target a specific application. In this review paper, we show that trap charging dynamics can explain some of the memristive effects previously reported for Schottky-barrier field-effect Si nanowire transistors (SB SiNW FETs). Moreover, the SB SiNW FETs do show additional memristive functionality due to trap charging at the metal/semiconductor surface. The combination of these two memristive effects into multiterminal metal-oxide-semiconductor field-effect transistor (MOSFET) devices gives rise to new opportunities for both memory and logic applications as well as new sensors based on the physical mechanism that originate memristance. In the special case of four-terminal memristive Si nanowire devices, which are presented for the first time in this paper, enhanced functionality is demonstrated. Finally, the multiterminal memristive devices presented here have the potential of a very high integration density, and they are suitable for hybrid complementary metal-oxide-semiconductor (CMOS) cofabrication with a CMOS-compatible process.
Keywords :
CMOS logic circuits; CMOS memory circuits; MOSFET; Schottky gate field effect transistors; memristors; nanowires; CMOS-compatible process; Schottky-barrier field-effect nanowire transistors; Si; electron device landscape; four-terminal memristive nanowire devices; hybrid CMOS cofabrication; hybrid complementary metal-oxide-semiconductor cofabrication; logic applications; material state modification; memory applications; memristive effects; metal-semiconductor surface; multiterminal MOSFET devices; multiterminal memristive devices; multiterminal memristive nanowire devices; multiterminal metal-oxide-semiconductor field-effect transistor device; sensing applications; two-terminal devices; Dielectrics; FETs; Logic gates; Nanoscale devices; Nanowires; Schottky diodes; Semiconductor device measurement; Transistors; Ambipolar; Schottky barrier; memristor; nanowire; transistor;
fLanguage :
English
Journal_Title :
Proceedings of the IEEE
Publisher :
ieee
ISSN :
0018-9219
Type :
jour
DOI :
10.1109/JPROC.2011.2172569
Filename :
6104344
Link To Document :
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