High-performance InGaAs junction field-effect transistor with P/Be co-implanted gate

Author

Wang, Kou-Wei ; Cheng, C.L. ; Long, J. ; Mitcham, D.

Author_Institution

AT&T Bell Lab., Murray Hill, NJ, USA

Volume

9

Issue

5

fYear

1988

fDate

5/1/1988 12:00:00 AM

Firstpage

205

Lastpage

207

Abstract

InGaAs junction field-effect transistors (JFETs) are fabricated in metalorganic chemical-vapor-deposition (MOCVD)-grown n-InGaAs and semi-insulating Fe:InP layers on n/sup +/-InP substrate with a P/Be co-implanted p/sup +/ self-aligned gate. The device exhibits a transconductance of 245 mS/mm (intrinsic transconductance of 275 mS/mm) at zero gate bias and good pinch-off behavior for a gate length of 0.5 mu m. The effective electron velocity is deduced to be 2.8*10/sup 7/ cm/s, equal to the theoretical prediction.<>

Keywords

III-V semiconductors; gallium arsenide; indium compounds; ion implantation; junction gate field effect transistors; 0.5 micron; 245 mS; 275 mS; InGaAs-InP:Fe-InP; InGaAs:P, Be; InP; JFETs; MOCVD; coimplanted gate; effective electron velocity; gate length; ion implantation; junction field-effect transistor; pinch-off behavior; self-aligned gate; transconductance; zero gate bias; Electron mobility; FETs; Gallium arsenide; Indium gallium arsenide; Indium phosphide; Leakage current; P-n junctions; Rapid thermal annealing; Substrates; Transconductance;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.691

Filename

691