• DocumentCode
    1399750
  • Title

    Optimization of pseudomorphic HEMT´s supported by numerical simulations

  • Author

    Brech, Helmut ; Grave, Thomas ; Simlinger, T. ; Selberherr, Siegfried

  • Author_Institution
    Siemens AG, Munich, Germany
  • Volume
    44
  • Issue
    11
  • fYear
    1997
  • fDate
    11/1/1997 12:00:00 AM
  • Firstpage
    1822
  • Lastpage
    1828
  • Abstract
    Measurements and simulations of three different pseudomorphic high electron mobility transistors (PHEMT´s) are presented. The PHEMT´s possess the same epitaxial structure but different geometrical properties. For the simulations, the generic device simulator MINIMOS-NT is employed. This simulator is not restricted to planar device surfaces but is able to model complex surface topologies including the effect of passivating dielectric layers. Mixed hydrodynamic and drift-diffusion simulations are demonstrated. They include the DC characteristics as well as the bias-dependent gate capacitances. Thus, bias-dependent current-gain cutoff frequencies fT can be calculated. The results compare very well with the values obtained by small-signal parameter extractions from S-parameter measurements. Although a single consistent set of parameters is used for the simulations of all three devices, their characteristics are reproduced with an accuracy to our knowledge not reported before. Therefore, the DC and RF properties of PHEMT´s with geometries significantly different from the measured devices can be reliably predicted
  • Keywords
    high electron mobility transistors; semiconductor device models; DC characteristics; MINIMOS-NT; PHEMT; RF characteristics; S-parameters; current-gain cutoff frequency; drift-diffusion model; epitaxial structure; gate capacitance; hydrodynamic model; numerical simulation; optimization; passivating dielectric layer; pseudomorphic high electron mobility transistor; small-signal parameter extraction; surface topology; Capacitance; Dielectric devices; Electron mobility; HEMTs; Hydrodynamics; MODFETs; Numerical simulation; PHEMTs; Semiconductor process modeling; Topology;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.641348
  • Filename
    641348