DocumentCode
1399826
Title
Tantalum-gate thin-film SOI nMOS and pMOS for low-power applications
Author
Shimada, Hisayuki ; Hirano, Yuichi ; Ushiki, Takeo ; Ino, Kazuhide ; Ohmi, Tadahiro
Author_Institution
Tohoku Univ., Sendai, Japan
Volume
44
Issue
11
fYear
1997
fDate
11/1/1997 12:00:00 AM
Firstpage
1903
Lastpage
1907
Abstract
The threshold voltages of thin-film fully-depleted silicon-on-insulator (FDSOI) nMOS and pMOS have been controlled by employing tantalum (Ta) as the gate materials. Ta-gate FDSOI MOSFET´s have excellent threshold voltage control for 1.0 V application on low impurity concentration SOI layers in both nMOS and pMOS. The low-temperature processing after the gate oxidation step leads to good on/off characteristics in Ta-gate SOI MOSFET´s because of no reaction between Ta gate electrode and SiO2 gate insulator. This technology makes it possible to drastically decrease the number of the process steps for CMOS fabrication, because the same gate material is available for both nMOS and pMOS
Keywords
CMOS integrated circuits; MOSFET; integrated circuit metallisation; silicon-on-insulator; tantalum; thin film transistors; 1 V; CMOS fabrication; SiO2 gate insulator; Ta-SiO2-Si; Ta-gate thin-film SOI MOSFET; fully-depleted SOI MOSFETs; low impurity concentration SOI layers; low-power applications; low-temperature processing; nMOS devices; pMOS devices; threshold voltage control; Electrodes; Impurities; Insulation; MOS devices; Oxidation; Semiconductor thin films; Silicon on insulator technology; Threshold voltage; Transistors; Voltage control;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.641359
Filename
641359
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