DocumentCode :
1399829
Title :
Parallel architectures for image processing
Author :
Downton, A. ; Crookes, D.
Author_Institution :
Dept. of Electron. Syst. Eng., Essex Univ., Colchester, UK
Volume :
10
Issue :
3
fYear :
1998
fDate :
6/1/1998 12:00:00 AM
Firstpage :
139
Lastpage :
151
Abstract :
Image processing is often considered a good candidate for the application of parallel processing because of the large volumes of data and the complex algorithms commonly encountered. This paper presents a tutorial introduction to the field of parallel image processing. After introducing the classes of parallel processing a brief review of architectures for parallel image processing is presented. Software design for low-level image processing and parallelism in high-level image processing are discussed and an application of parallel processing to handwritten postcode recognition is described. The paper concludes with a look at future technology and market trends
Keywords :
digital signal processing chips; image processing; image recognition; optical character recognition; parallel architectures; handwritten postcode recognition; high-level image processing; image processing; low-level image processing; parallel architectures; parallel processing; software design;
fLanguage :
English
Journal_Title :
Electronics & Communication Engineering Journal
Publisher :
iet
ISSN :
0954-0695
Type :
jour
DOI :
10.1049/ecej:19980307
Filename :
692548
Link To Document :
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