EXTIGATE: The ultimate process architecture for submicron CMOS technologies

Author

Schwalke, Udo ; Kerber, Martin ; Koller, Klaus ; Jacobs, Hermann J.

Author_Institution

R&D Microelectron., Siemens AG, Munich, Germany

Volume

44

Issue

11

fYear

1997

fDate

11/1/1997 12:00:00 AM

Firstpage

2070

Lastpage

2077

Abstract

In this work, we present the novel process architecture EXTIGATE (EXtended Trench Isolation GAte TEchnology) which solves major problems associated with shallow-trench-isolation (STI) and n⁺/p⁺ dual workfunction gate technology. These achievements are realized without increasing process complexity or cost. Furthermore, the process window for planarization is enlarged leading to a robust, submicron n⁺/p⁺ gate STI-CMOS process ideally suited for low-voltage CMOS applications

Keywords

CMOS integrated circuits; integrated circuit measurement; ion implantation; isolation technology; oxidation; EXTIGATE; extended trench isolation gate technology; low-voltage CMOS applications; n⁺/p⁺ dual workfunction gate technology; planarization; post-gate implantation scheme; process architecture; process window; robust submicron n⁺/p⁺ gate STI-CMOS process; shallow-trench-isolation; sidewall oxidation; submicron CMOS technologies; CMOS process; CMOS technology; Costs; Etching; Isolation technology; Jacobian matrices; MOS devices; Oxidation; Planarization; Robustness;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.641386

Filename

641386