• DocumentCode
    1400448
  • Title

    Bringing up a chip on the cheap

  • Author

    Wachs, Matthias ; Shacham, O. ; Asgar, Z. ; Firoozshahian, A. ; Richardson, S. ; Horowitz, Mark

  • Author_Institution
    Electr. Eng. Dept., Stanford Univ., Stanford, CA, USA
  • Volume
    29
  • Issue
    6
  • fYear
    2012
  • Firstpage
    57
  • Lastpage
    65
  • Abstract
    Booting and debugging the functionality of silicon samples are known to be challenging and time-consuming tasks, even more so in cost-constrained environments. The authors describe their creative solutions used to bring up Stanford Smart Memories (SSM), a 55-million transistor research chip.
  • Keywords
    storage management chips; Stanford Smart Memories; cost constrained environment; debugging; silicon samples; time consuming task; transistor research chip; Debugging; Field programmable gate arrays; System-on-a-chip; Testing; BEE2; Bringup; FPGA; JTAG; Smart Memories;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2011.2179849
  • Filename
    6105527
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1400448