Modeling of minority-carrier surface recombination velocity at low-high junction of an n+-p-p+ silicon diode

Modeling of recombination velocity of minority carriers at the p-p ⁺ low-high junction end of the p-base region of n⁺-p-p⁺ silicon diodes is carried out by taking the minority-carrier recombination effects in the space-charge region (SCR) of the low-high (L-H) junction into account. Solving Poisson´s equation in the SCR numerically revealed that the SCR is composed of an accumulation layer on the p side and a depletion layer on the p⁺ side. Generally, the depletion layer is very thin as compared with the accumulation layer, and the built-in potential across the depletion layer never exceeds the thermal voltage, i.e. kT/q. Further, the minority-carrier recombination in this layer is also insignificant. For most L-H junction-based silicon devices, in practice, the minority-carrier recombination in the accumulation layer controls the value of the effective minority-carrier recombination velocity (S_eff) at the back surface of the p-base region and the influence of the recombination in the heavily doped p⁺ region is less significant