Pre-production results demonstrating multiple-system models for yield analysis

We have assembled an integrated view of the entire via manufacturing process. This integrated study includes five key plasma processes that culminate in the production of vias on CMOS wafers. There are essentially no linear cross-correlations between the processing steps and there are no linear correlations between the individual process steps and the yield for vias, as measured by the resistance between metal-one (M1) and metal-two (M2). Using a neural network, we demonstrate that the key processing steps to determine the M1M2 resistance are the thick oxide deposition and the anisotropic via etch. Of lesser significance are the etchback planarization, an isotropic etch and plasma enhanced tetra-ethoxy silane (PETEOS) deposition. Keeping in mind that there are five processing steps, the numerical value of M1M2 resistance can be predicted ahead of time, before completion of all five processes. This prediction can be done to an accuracy of about 1 Ω. By using adaptive neural networks, the intelligent agents can modify their predictive behavior with respect to process changes effected by the engineering staff. Our pre-production demonstration suggests that these programs could be used in feedback and feedforward control for production yield