Title :
DABC-NV: A buffer cache architecture for mobile systems with heterogeneous flash memories
Author :
Junseok Park ; Eunji Lee ; Hyokyung Bahn
Author_Institution :
Sch. of Comput. Sci. & Eng., Seoul Nat. Univ., Seoul, South Korea
fDate :
11/1/2012 12:00:00 AM
Abstract :
Flash memory is widely used in mobile consumer electronics devices due to its good properties such as small size, shock resistance, and low-power consumption. However, the cost of flash memory is still high to accommodate ever-growing mobile applications and multimedia contents. Using MLC (multilevel cell) technologies is an efficient solution to extend the storage capacity, but it degrades the performance of flash memory significantly compared to the original storage based on SLC (single-level cell) technologies. To bridge the characteristics of the two technologies, this paper presents a new buffer cache management scheme that uses both MLC and SLC together and considers their heterogeneous characteristics. By allocating cache space based on the characteristics of each storage media as well as I/O operation types and reference history of buffered blocks, the proposed scheme improves the I/O performance of mobile systems by 24% on average and up to 180% compared to the CLOCK algorithm. Moreover, it guarantees high reliability of file data by adopting recently emerging non-volatile RAMs in a certain portion of the buffer cache.
Keywords :
cache storage; flash memories; input-output programs; mobile communication; reliability; CLOCK algorithm; DABC-NV; I-O operation type; buffer cache architecture; buffer cache management scheme; cache space; file data; heterogeneous characteristics; heterogeneous flash memories; mobile system; storage media; Buffer storage; Clocks; Computer architecture; Flash memory; Mobile communication; Nonvolatile memory; Random access memory; MLC flash memory; NANDflash memory; NVRAM; buffer cache; replacement algorithm;
Journal_Title :
Consumer Electronics, IEEE Transactions on
DOI :
10.1109/TCE.2012.6414991