• DocumentCode
    1401233
  • Title

    An efficient fast intra mode decision method based on orthogonal modes elimination

  • Author

    Pejman, H. ; Zargari, Farzad

  • Author_Institution
    Dept. of Comput. Eng., Islamic Azad Univ., Tehran, Iran
  • Volume
    58
  • Issue
    4
  • fYear
    2012
  • fDate
    11/1/2012 12:00:00 AM
  • Firstpage
    1445
  • Lastpage
    1452
  • Abstract
    One of the computationally intensive stages in the H.264/AVC encoder is intra prediction. This is because rate-distortion optimization (RDO) is performed for the entire possible modes to select the optimum intra prediction mode. Fast intra mode decision methods have been introduced to reduce the number of tested modes by RDO to a few prediction modes. In this paper, a new fast mode decision method is introduced for H.264/AVC encoder. The proposed method is based on the idea that when one of the prediction modes achieves good RDO, its orthogonal prediction mode will not perform well. As a result, we select by simple measures only one of the orthogonal modes and perform RDO only for the selected modes. Simulation results indicate that the proposed method achieves higher peak signal-to-noise ratio (PSNR) and lower bit-rate when compared with other proposed fast mode decision methods with hardware realization. Moreover, we have proposed a three-stage pipelined architecture for our fast mode decision method, which can operate at 175 MHz maximum clock rate. Synthesis results indicate that the three-stage pipelined architecture achieves lower gate count and higher maximum clock rate when compared with hardware realizations for other fast mode decision methods and can be used to encode real-time videos of H.264/AVC standard up to level 5.1.
  • Keywords
    video coding; H.264-AVC encoder; PSNR; RDO; bit rate; clock rate; efficient fast intramode decision method; gate count; hardware realization; optimum intraprediction mode; orthogonal mode elimination; orthogonal prediction mode; peak signal-to-noise ratio; rate-distortion optimization; real-time videos; three-stage pipelined architecture; Computer architecture; Hardware; PSNR; Prediction algorithms; Vectors; Video coding; Voltage control; H.264/AVC; Intra prediction; fast mode decision; orthogonal modes; ratedistortionoptimization;
  • fLanguage
    English
  • Journal_Title
    Consumer Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-3063
  • Type

    jour

  • DOI
    10.1109/TCE.2012.6415005
  • Filename
    6415005