DocumentCode :
1401573
Title :
Gate-First Integration of Tunable Work Function Metal Gates of Different Thicknesses Into High- 
/Metal Gates CMOS FinFETs for Multi-  into high-k/metal gates CMOS FinFETs was demonstrated to achieve multiple threshold voltages (V<sub>Th</sub>) for 32-nm technology and beyond logic, memory, input/output, and system-on-a-chip applications. The fabricated devices showed excellent short-channel effect immunity (drain-induced barrier lowering ~40 mV/V), nearly symmetric V<sub>Th</sub>, low T<sub>inv</sub> (~1.4 nm), and high I<sub>on</sub> (~780 ¿A/¿m) for N/PMOS without any intentional strain enhancement.</div>
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<div class='leftDiv labelDiv col-xs-4 col-sm-2 fullRecLabelEnglish'>Keywords : </div><div class='valueDiv leftDirection leftAlign col-xs-8 col-sm-10 fullRecValueEnglish'>CMOS integrated circuits; MOSFET; high-k dielectric thin films; N/PMOS; drain-induced barrier lowering; fabricated devices; gate-first integration; high-k/metal gates CMOS FinFETs; multiVTh engineering; multiple threshold voltages; short-channel effect immunity; strain enhancement; system-on-a-chip; tunable work function metal gates; CMOS logic circuits; Degradation; Doping; Fabrication; FinFETs; High K dielectric materials; High-K gate dielectrics; Jamming; System-on-a-chip; Threshold voltage; FinFET; gate-first integration; high- <formula formulatype=)
$k$ /metal gates stack; tunable work function (TWF);
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2009.2039097
Filename :
5404737
Link To Document :
